The present disclosure relates to integrated circuit (IC) device manufacturing processes especially replacement gate processes.
In an effort to increase device densities, many years of research have been devoted to reducing critical dimensions (CDs) in semiconductor devices. This research has led to a long felt need to replace traditional gate materials with high-k dielectrics and metal gates. High-k dielectrics can provide enhanced capacitance in comparison to an equivalent thickness of silicon dioxide. Metal electrodes with suitable work functions can avoid charge carrier depletion proximate the electrode interface with the high-k dielectric. The electrodes for P-channel and N-channel transistors generally require different metals.
Suitable metals for gate electrodes can be adversely affected by processing used to form source and drain regions. In particular, annealing can cause an undesirable shift in the work function of electrode metals. This has led to the development of various new processes, including replacement gate (gate-last) processes. In a replacement gate process, a dummy gate stack is formed, which is a gate stack formed using polysilicon in place of metals. After source and drain regions are formed, the polysilicon is removed to form trenches which are then filled with the desired metals.